Crosstalk

Now you might be wondering how we came down to the topic of crosstalk even with the presence of all the vast knowledge over the internet. But as I prefer to start on a simple issue and then extend into every possibility related to it this topic has been taken up.

Crosstalk is defined as the undesirable electric interaction between two or more nets due to coupling capacitor between them. It occurs between parallel wires, usually due to the undesired capacitive, inductive or conductive coupling between the channels. It finally impacts the timing in the circuits. Crosstalk has two effects.

1. Crosstalk Delay- It implies the delay happening in the output transition of victim due to transition of aggressor.

2. Crosstalk Noise- This implies of the undesired changes in logical values of victim due to switching in the aggressor net.

Fig1: Coupling between parallel nets

When one net is switching and other net is at a constant value, the switching net may impact on the other net by causing voltage spikes on the signal.

In Fig1 aggressor is a net which creates the affect of its transition on other net running parallel to it while victim is the net which is affected by aggressor net.

When the signal traverses through the aggressor net from one end to another, charge gets stored in the coupling capacitance between its parallel net(s) due to any electrical interference. At the same time, the charge stored in the capacitance will also discharge onto the node in the victim signal net.

The aggressor signal is a higher frequency signal while the signal traversing the victim net is of lower frequency. When any two nets are running parallel to each other and the spacing between them is less then that which is directed by the design rule constraints (DRC) in the library file the coupling capacitance exceeds the minimum value then crosstalk occurs. Crosstalk depends on whether the signals are transmitting at the same time or not. Transition of both the signals at the same time in opposite direction yields the worst cross talk impact. In order to resolve this we do shifting in the timing window by adding buffers or delay cells to the aggressor path without impacting any of the functionality.

Crosstalk delta is a measure of how much the victim net signal has degraded because of noise caused as a result of crosstalk. The victim net is affected based on the rise and fall transitions on respective nets under impact of crosstalk.

Case 1: Both Aggressor and Victim is rising

Fig2: Aggressor and Victim transitioning in same direction

The net capacitance seen by the victim in case 1 shown by fig2 when the parallel net are transitioning in the same sense is (Cg1 + Cc).

Case 2: Aggressor is rising and Victim is falling

Fig3: Aggressor and Victim transitioning in opposite direction

The net capacitance seen by the victim in case 2 shown by fig3 when the parallel net are transitioning in the opposite sense is (Cg1 + 2Cc).

Case 3: Aggressor is falling and Victim is rising

Fig4: Aggressor and Victim transitioning in opposite direction

The net capacitance seen by the victim in case 3 shown by fig4 when the parallel net are transitioning in the opposite sense is (Cg1 + 2Cc) again.

Case 4: Aggressor is rising and Victim is constant

Fig5: Aggressor rising while victim is constant

The net capacitance seen by the victim in case 3 shown by fig5 when the parallel net are transitioning in the opposite sense as shown is just Cg1.

Crosstalk effects the timing of the circuit in the following ways:

1. In case of data path when aggressor net and victim net transition in the same direction and the victim transitioning is faster then data arrives early which may lead to hold violation.
2. In case of clock path when the aggressor net and the victim net transitions are in the same direction, the victim transition is improved due to the minimized coupling capacitance seen by the victim net. As such this makes the clock signal to arrive faster which could lead to setup  violation.
3. In case of data path when aggressor net and victim net both transitions in opposite direction, the victim data transition becomes slow due to the high value of coupling capacitance seen by the victim. As such the data arrives slowly, which might lead to setup violation.
4. In case of clock path when aggressor net and victim net are transitioning in opposite direction, the victim signal transition becomes slow which thereby makes clock to arrive slowly which lead to hold violation.

Ways to fix Crosstalk issues:

1. Shielding – Crosstalk is reduced by placing a supply or ground net in between aggressor and victim net so that the voltage discharge is through this unchanging shield net.
2. NDR- Non default rules can be applied to the crosstalk critical nets to increase the width of these nets and also the spacing between the aggressor and victim nets to reduce the coupling capacitance.
3. Interleaving the mutually exclusive signal nets where the lower frequency nets are brought in between the aggressor and the victim so that the almost constant net provides a path for electrical discharge and avoid any generation of noise due to otherwise generated glitch.
4. Upsize the victim net driver so that the transition of the victim signal is improved and impact due to a glitch can be minimised.
5. Downsize the aggressor net driver so that the aggressor signal causes lesser impact on the victim node
6. Shifting timing window so that the transitions in the aggressor and victim nets are aligned to reduce the net capacitance viewed by the victim net.